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Vorlesung: 03-IMAP-QSE Qualitätsorientierter Systementwurf - Details

Vorlesung: 03-IMAP-QSE Qualitätsorientierter Systementwurf - Details

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Veranstaltungsname Vorlesung: 03-IMAP-QSE Qualitätsorientierter Systementwurf
Untertitel
Veranstaltungsnummer 03-IMAP-QSE
Semester SoSe 2025
Aktuelle Anzahl der Teilnehmenden 31
Heimat-Einrichtung Informatik
Veranstaltungstyp Vorlesung in der Kategorie Lehre
Erster Termin Dienstag, 08.04.2025 08:00 - 10:00, Ort: MZH 5500
Art/Form
Voraussetzungen Inhaltliche Voraussetzung: Technische Informatik 1.
Lernorganisation The course is delivered in the form of lectures and tutorials, and the lecturers and tutors will be giving office hours to answer the students' questions and support them through the selection and carry on of their projects.
The lectures explain the basics of design flows (for systems/hardware/software with a focus on electronic circuits design) and formal methods (from the design description languages, to the specifications and their formal verification). It covers the basic theory and gives various examples of applications and the rational behind the selection of certain verification methods for certain aspects. The course focuses on checking the functional correctness (as the main quality attribute, but also other quality aspects -e.g. usability, efficiency, reliability, scalability, sustainability... etc- will be discussed) of the designed systems and circuits using formal methods. The tutorials will give concrete exercises and illustrate specific tools as practical examples and hands on experience that is necessary to understand how concepts discussed in the lectures are actually implemented in practice.
Leistungsnachweis The students are asked to apply the knowledge they gained in a project of their selection that applies one of the formal methods given in the course to selected case-study (by the students from a pile of given ideas or one of their own but approved by the instructors). The students are expected to show why they chose to use the method they select (and not another) for their chosen case-study and how they tailored the method and the tool they used to better reach their verification objective.
The project should result in artifacts like: design artifacts (code describing the system/hw/sw, scripts automating the tools usage, verification results/report, ...etc), and a report justifying the selection of the tool and the methodology used and reporting the main results. A small 15 minutes discussion will be carried on after the project submission. The projects are recommended to be done in a group of two. However, individual or more than two students are allowed but after gaining approval from the instructors. The size of the project and the effort should be proportional to the number of participants. It is important that all the participants are aware of each other’s roles and are all on the same level of understanding of why they selected certain method and not others for their project. In this variant weekly assignment solutions will be considered (up to 10%) as bonus, that can amend missing points during in the project evaluation.

Alternatively, any student can opt for the oral exam option which will require them to have understanding of the contents of the lectures, tutorials and any recommended literature given during the course.
Englischsprachige Veranstaltung Ja
Sonstiges Course Description:
This course gives an introduction to computer-aided design with focus on formally verifying quality aspects. First, an overview of design methods is given, covering system, hardware and software description languages; a special focus will be the embedded systems and electronic circuits design. The course focuses on checking the correctness (as the main quality attribute, but also other quality aspects will be discussed if the time permits) of the designed systems and circuits using formal methods.
The event is open to students of computer science and systems engineering.
The following topics are covered:
• Design flows
• Hardware/System/Software description languages (with special focus on Hardware Description languages)
• Verification/Validation
• Formal methods
• Boolean proof methods
• Model Checking
• Equivalence-Checking
ECTS-Punkte 6

Räume und Zeiten

MZH 5500
Dienstag: 08:00 - 10:00, wöchentlich (14x)
MZH 1100
Donnerstag: 10:00 - 12:00, wöchentlich (11x)

Modulzuordnungen